For a semiconductor switching element implementing a semiconductor power conversion device such as an inverter or a converter, active gate control for dynamically controlling a gate voltage is employed as a technique for suppressing a peak voltage in a switching operation without requiring a snubber circuit.
For example, Japanese Patent Laying-Open No. 2001-136732 (hereinafter, Patent Document 1) discloses a semiconductor power conversion device including voltage application means for applying forward bias and reverse bias to a gate to set an emitter of a semiconductor switching element to an intermediate potential and voltage division means for dividing a collector-emitter voltage, in which a gate voltage is controlled in accordance with a voltage across the collector and the emitter when the collector-emitter voltage is equal to or greater than a voltage determined by the voltage division means while a drive signal is OFF.
According to the semiconductor power conversion device disclosed in Patent Document 1, gate voltage control, that is, active gate control, can be carried out such that feedback of a surge voltage is provided to lower the surge voltage, by dynamically controlling the gate voltage based on the divided collector-emitter voltage while the semiconductor switching element is OFF.
In addition, Japanese Patent Laying-Open No. 2001-238431 (hereinafter, Patent Document 2) discloses a semiconductor power conversion device configured to include a semiconductor switching element for power conversion connected to each arm connecting a DC power supply and a load to each other, that is, an IGBT (Insulated Gate Bipolar Transistor) having a collector and an emitter connected in series to the arm, a capacitor connected between the collector and a gate of this IGBT and supplying a current adapted to a rate of variation of the collector-emitter voltage to the gate, and an auxiliary DC power supply connected in parallel to the capacitor through a buffer diode. In addition, a configuration for supplying a current to the gate through the capacitor when a voltage obtained by adding decrease in a forward voltage of the buffer diode to a voltage of the capacitor on the collector side exceeds an output voltage of the auxiliary DC power supply is shown.
According to the semiconductor power conversion device disclosed in Patent Document 2, when a collector voltage exceeds a prescribed voltage obtained by charging the capacitor with the auxiliary DC power supply, feedback is activated so that the gate voltage can be varied to lower a surge voltage. Thus, active gate control can be carried out so as to lower the surge voltage.
In general, in an inverter included in an air-conditioner or a hybrid vehicle, control for dynamically varying a main circuit power supply voltage converted by the inverter (semiconductor power conversion device) depending on a drive condition of a motor driven and controlled by the inverter is carried out.
On the other hand, in conventional active gate control represented by Patent Documents 1 and 2, whether or not a gate voltage is to be varied to suppress a surge voltage is determined based on comparison between a collector voltage of a semiconductor switching element and a prescribed fixed voltage. Namely, a set voltage at which active gate control is activated is fixed.
Therefore, if the set voltage above is determined in accordance with a maximum value of the main circuit power supply voltage as designed, active gate control can be exerted such that a withstand voltage of the semiconductor switching element is not exceeded. On the other hand, if the main circuit power supply voltage is controlled to a low voltage, suppression of surge through active gate control cannot effectively be achieved. In such a case, a feedback amount through active gate control decreases and a switching operation of the semiconductor switching element becomes a simple operation of simply alternately applying a forward bias voltage (voltage for turn-on) and a reverse bias voltage (voltage for turn-off) to the gate, which results in failure in suppression of voltage variation involved with turn-on and turn-off. Consequently, free oscillation voltage variation may take place due to a parasitic capacitance of the semiconductor switching element and a parasitic inductance of a main circuit, and such an oscillation voltage causes EMI (electro-magnetic interference) represented by electromagnetic noise.
In addition, as pointed out in general, where the motor is driven and controlled by the inverter, dielectric breakdown due to partial discharge between windings inside the motor is more likely when voltage fluctuation (dv/dt) of an output voltage from the inverter is excessive. In order to prevent this, it is important to suppress dv/dt within a prescribed range. Here, as described above, suppression of dv/dt is important also from a point of view of measures against EMI.
In active gate control in the semiconductor power conversion device disclosed in Patent Documents 1 and 2, however, a condition of a voltage at which active gate control is activated is determined based on comparison between a collector voltage and a prescribed voltage (set voltage). Accordingly, it is not easy to carry out active gate control so as to strictly restrict dv/dt of a collector-emitter voltage of the semiconductor switching element implementing the inverter. Consequently, it has been difficult to reliably suppress dv/dt of the output voltage from the inverter, that is, a voltage across terminals of the motor, within a prescribed range.